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Microchip Technology /ATSAMD51P19A /OSCCTRL /DFLLMUL

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Interpret as DFLLMUL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MUL0FSTEP0CSTEP

Description

DFLL48M Multiplier

Fields

MUL

DFLL Multiply Factor
FSTEP

Fine Maximum Step
CSTEP

Coarse Maximum Step

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data